This thesis presents a qualitative and quantitative comparison between an MMIC LNA packaged on PCB, and hybrid LNAs at V-band. This includes a quantitative study of the TID electron radiation on SiGe MMIC LNA at mm-wave as well as MMIC EM simulation protocol at mm-wave frequencies.
The MMIC LNA and the on-chip transistor were fabricated in the 130nm BiCMOS8HP process. The design configurations were adopted from literature for both the MMIC LNA and hybrid LNAs. The layout generated was subjected to RC parasitic extraction and 3D EM validation with both FEM and MoM. This was done to investigate the effect of on-chip parasitics on LNAs at mm-wave using SOTA methods, which confirmed the superior accuracy of the FEM approach but also revealed the value of RCPE for early design iterations.
The MMIC LNA was subjected to TID electron radiation, irradiated up to 15 Mrad/(Si) over 72 hrs. The device was measured for linear and noise figure performance over increasing total dose levels. It is found that the original gain of 14.84 dB and noise figure of 7.44 dB were degraded to 12.3 dB and 9.5 dB, respectively, with gradual degradation of gain, noise figure and operating bandwidth.
For the hybrid LNA, the on-chip transistors were bonded onto XT/Duroid 8100 soft substrate. The on-chip interconnection to the transistors, off-chip transmission lines and the interconnection to PCB were all modelled using 3D EM FEM. The resulting S-parameters were then used for circuit co-simulation. The MMIC LNA is mounted to PCB using flip-chip and wire-bond interconnects, while for the hybrid LNA, the transistors alone are mounted on the PCB using flip-chip and wire-bond, with the matching network off-chip. In addition, the RF coupling capacitors used coupled line bandpass filters also fabricated on PCB. These filters were then integrated as part of the matching networks. All off-chip passives were prototyped and characterized separately, including characterization of the substrate material itself.
The MMIC LNA had a simulated peak gain of 14.95 with NF of 7.66 dB, while each estimating an input 1 dB compression point of -15.6 dBm. The EM simulation revealed that insertion loss of less than 2.5 dB is expected for the on-chip transmission lines and flip-chip interconnects, while up to 6 dB can be expected for wire-bond transitions.
The MMIC LNA mounted on PCB by wire-bonding achieved a peak gain of 10.2 dB, with 12.2 dB expected when mounted by flip-chip bonding. In contrast, the hybrid LNA achieved 5.05 dB gain when integrating the transistors by wire-bonding and 10 dB when integrated using flip-chip bonding. This result is reflected in the NF as well, with the MMIC LNA achieving 7.66 dB NF in isolation, 9.74 dB when packaged on PCB using wire-bonds and 7.8 dB when packaged using flip-chip mounting. In contrast, the hybrid LNA using wire-bond integration achieves 10.4 dB of NF, while hybrid integration using flip-chip mounting achieves 7.9 dB. This data clearly illustrates the superiority of the MMIC LNA over its counterparts, despite a somewhat reduced -1 dB operating bandwidth.