Abstract:
With ever-increasing wireless network demands, low-complexity reconfigurable filter
design is expected to continue to require research attention. Extracting and reconfiguring channels
of choice from multi-standard receivers using a generalized discrete Fourier transform filter bank
(GDFT-FB) is computationally intensive. In this work, a lower compexity algorithm is written for this
transform. The design employs two different approaches: hybridization of the generalized discrete
Fourier transform filter bank with frequency response masking and coefficient decimation method 1;
and the improvement and implementation of the hybrid generalized discrete Fourier transform using
a parallel distributed arithmetic-based residual number system (PDA-RNS) filter. The design is evaluated
using MATLAB 2020a. Synthesis of area, resource utilization, delay, and power consumption
was done on a Quartus 11 Altera 90 using the very high-speed integrated circuits (VHSIC) hardware
description language. During MATLAB simulations, the proposed HGDFT algorithm attained a 66%
reduction, in terms of number of multipliers, compared with existing algorithms. From co-simulation
on the Quartus 11 Altera 90, optimization of the filter with PDA-RNS resulted in a 77% reduction in
the number of occupied lookup table (LUT) slices, an 83% reduction in power consumption, and an
11% reduction in execution time, when compared with existing methods.
