Phase noise reduction of a 0.35 μm BiCMOS SiGe 5 GHz Voltage Controlled Oscillator

dc.contributor.advisorSinha, Saurabhen
dc.contributor.emailwynand.lambrechts@ieee.orgen
dc.contributor.postgraduateLambrechts, Johannes Wynand
dc.date.accessioned2013-09-07T15:36:41Z
dc.date.available2010-05-13en
dc.date.available2013-09-07T15:36:41Z
dc.date.created2009-11-11en
dc.date.issued2010-05-13en
dc.date.submitted2009-11-11en
dc.descriptionDissertation (MEng)--University of Pretoria, 2010.en
dc.description.abstractThe research conducted in this dissertation studies the issues regarding the improvement of phase noise performance in a BiCMOS Silicon Germanium (SiGe) cross-coupled differential-pair voltage controlled oscillator (VCO) in a narrowband application as a result of a tail-current shaping technique. With this technique, low-frequency noise components are reduced by increasing the signal amplitude without consuming additional power, and its effect on overall phase noise performance is evaluated. The research investigates effects of the tail-current as a main contributor to phase noise, and also other effects that may influence the phase noise performance like inductor geometry and placement, transistor sizing, and the gain of the oscillator. The hypothesis is verified through design in a standard 0.35 μm BiCMOS process supplied by Austriamicrosystems (AMS). Several VCOs are fabricated on-chip to serve for a comparison and verify that the employment of tail-current shaping does improve phase noise performance. The results are then compared with mathematical models and simulated results, to confirm the hypothesis. Simulation results provided a 3.3 dBc/Hz improvement from -105.3 dBc/Hz to -108.6 dBc/Hz at a 1 MHz offset frequency from the 5 GHz carrier when employing tail-current shaping. The relatively small increase in VCO phase noise performance translates in higher modulation accuracy when used in a transceiver, therefore this increase can be regarded as significant. Parametric analysis provided an additional 1.8 dBc/Hz performance enhancement in phase noise that can be investigated in future works. The power consumption of the simulated VCO is around 6 mW and 4.1 mW for the measured prototype. The circuitry occupies 2.1 mm2 of die area. Copyrighten
dc.description.availabilityunrestricteden
dc.description.departmentElectrical, Electronic and Computer Engineeringen
dc.identifier.citationLambrechts, JW 2009, Phase noise reduction of a 0.35 μm BiCMOS SiGe 5 GHz Voltage Controlled Oscillator, MEng dissertation, University of Pretoria, Pretoria, viewed yymmdd < http://hdl.handle.net/2263/29413 >en
dc.identifier.otherC10/116/gmen
dc.identifier.upetdurlhttp://upetd.up.ac.za/thesis/available/etd-11112009-190546/en
dc.identifier.urihttp://hdl.handle.net/2263/29413
dc.language.isoen
dc.publisherUniversity of Pretoriaen_ZA
dc.rights© 2009, University of Pretoria. All rights reserved. The copyright in this work vests in the University of Pretoria. No part of this work may be reproduced or transmitted in any form or by any means, without the prior written permission of the University of Pretoria.en
dc.subjectPhase noiseen
dc.subjectVoltage controlled oscillator (VCO)en
dc.subjectSilicon Germanium (SiGe)en
dc.subjectSingle sideband (SSB)en
dc.subjectBipolar CMOS (BiCMOS)en
dc.subjectPerformance trade-offsen
dc.subjectLC oscillatoren
dc.subjectNarrowbanden
dc.subjectActive circuiten
dc.subjectAnalogue integrated circuit (IC)en
dc.subjectHeterojunction bipolar transistor (HBT)en
dc.subjectTail-current suppressionen
dc.subjectUCTDen_US
dc.titlePhase noise reduction of a 0.35 μm BiCMOS SiGe 5 GHz Voltage Controlled Oscillatoren
dc.typeDissertationen

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