Deadlock-freeness of hexagonal systolic arrays
| dc.contributor.author | Gruner, Stefan | |
| dc.contributor.author | Steyn, T.J. | |
| dc.contributor.email | sg@cs.up.ac.za | en_US |
| dc.date.accessioned | 2013-12-11T11:50:37Z | |
| dc.date.available | 2013-12-11T11:50:37Z | |
| dc.date.created | 2009 | |
| dc.date.issued | 2010-07 | |
| dc.description.abstract | With the re-emergence of parallel computation for technical applications in these days also the classical concept of systolic arrays is becoming important again. However, for the sake of their operational safety, the question of deadlock must be addressed. For this contribution we used the well-known Roscoe-Dathi method to demonstrate the deadlock-freeness of a systolic array with hexagonal connectivity. Our result implies that it is theoretically safe to deploy such arrays on various platforms. Our proof is valid for all cases in which the computational pattern (input-output-behaviour) of the array does not depend on the particular values (contents) of the communicated data. | en_US |
| dc.description.librarian | mv2013 | en_US |
| dc.description.uri | http://www.elsevier.com/locate/ipl | en_US |
| dc.format.extent | 9 p. | en_US |
| dc.identifier.citation | Gruner, S & Steyn, TJ 2010, 'Deadlock-freeness of hexagonal systolic arrays', Information Processing Letters, vol. 110, no. 14-15, pp. 539-543. | en_US |
| dc.identifier.issn | 0020-0190 (print) | |
| dc.identifier.issn | 1872-6119 (online) | |
| dc.identifier.other | 10.1016/j.ipl.2010.04.021 | |
| dc.identifier.uri | http://hdl.handle.net/2263/32861 | |
| dc.language.iso | en | en_US |
| dc.publisher | Elsevier | en_US |
| dc.rights | © 2010 Elsevier. All rights reserved. Notice : this is the author’s version of a work that was accepted for publication in Information Processing Letters. Changes resulting from the publishing process, such as peer review, editing, corrections, structural formatting, and other quality control mechanisms may not be reflected in this document. Changes may have been made to this work since it was submitted for publication. A definitive version was subsequently published in Information Processing Letters 110 (2010) 539–543 doi:10.1016/j.ipl.2010.04.021 | en_US |
| dc.subject | Parallel processing | en_US |
| dc.subject | Parallelism | en_US |
| dc.subject | Systolic array | en_US |
| dc.subject | Deadlock | en_US |
| dc.subject | Roscoe-Dathi-method | en_US |
| dc.title | Deadlock-freeness of hexagonal systolic arrays | en_US |
| dc.type | Preprint Article | en_US |