Electrical characterisation of plasma processing induced defects in silicon

Abstract

Plasma processing techniques have become vital for the fabrication of sub-micron size semiconductor devices. For instance, sputter deposition is used during metallization steps for the deposition of refractory metals and the stoichiometric deposition of alloys. Plasma or dry etching is used for the transfer of patterns onto semiconductors with sub-micron line-width resolution. Sputter deposition and sputter etching make use of low energy noble gas ions (0.2-2 keV), which impinge on the exposed substrate during processing to create damage in the semiconductor lattice. The defects thus produced modify the electrical, optical and structural properties of the semiconductor and of devices fabricated thereon. The extent of the property modifications depends critically on the plasma parameters, such as plasma operation mode (de or rt), etch rate, pressure and power, amongst others. In order to avoid the deleterious effects of these defects or to use them to engineer the semiconductor properties during processing, it is essential to know the electrical, optical and structural properties of the defects. This exercise also leads to process optimisation. Finally, the annealing properties of the processing-induced defects must be known so that they can be removed, if required, by in-situ or post-processing high temperature treatments. Sputter deposition of TiW and Au contacts on n-Si introduced electrically active defects in the substrate. The barrier height of the Schottky diodes were lower than those of control diodes fabricated by resistive evaporation. Furthermore, the barrier height of the sputter deposited diodes decreased with decreasing plasma pressure, suggesting that more donor-type defects are introduced with decreasing pressure. Sputter etching in an Ar plasma also introduced several electrically active defects in n-Si. The amount of damage was found to increase with decreasing plasma pressure. Donor-type defects, responsible for the degraded quality of the diodes fabricated on the etched surfaces by resistive evaporation, were found to be confined close to the metal-semiconductor interface. Acceptor-type defects caused a reduction in the free carrier concentration of the semiconductor to depths much larger than the theoretical range of the low energy Ar ions. This suggests that some defects migrate away from the region where they are produced during processing. The amount of residual damage was observed to decrease with increasing etch time up to 6 min, and thereafter increased. For relatively low etch periods of time, defect accumulation dominates over their removal by physical sputtering. Etching for more than 6 min is speculated to introduce extended defects or amorphize the near surface region. Isochronal annealing studies showed that most of the defects could be removed by annealing above 500 °C. However, a prominent secondary defect which was stable at 650 °C was introduced during annealing. Low energy noble gas ion bombardment created different defects compared to 5.4 MeV alpha-particle irradiation of n-Si. This has been explained by considering the energy loss mechanisms of the ions in these energy ranges. It is shown that large vacancy clusters and non-radiative recombination centres are produced during the low energy noble gas ion bombardment of n-Si.