Design and manufacture of nanometre-scale SOI light sources

Abstract

To investigate quantum confinement effects on silicon (Si) light source electroluminescence (EL) properties like quantum efficiency, external power efficiency and spectral emission, thin Si finger junctions with nanometre-scale dimensions were designed and manufactured in a fully customized silicon-on-insulator (SOI) semiconductor production technology. Since commonly available photolithography is unusable to consistently define and align nanometre-scale line-widths accurately and electron-beam lithography (EBL) by itself is too time-expensive to expose complete wafers, the wafer manufacturing process employed a selective combination of photolithography and EBL. The SOI wafers were manufactured in the clean-rooms of both the Carl and Emily Fuchs Institute for Microelectronics (CEFIM) at the University of Pretoria (UP) and the Georgia Institute of Technology’s Microelectronic Research Centre (MiRC), which made a JEOL JBX-9300FS electron-beam pattern generator (EPG) available. As far as is known this was the first project in South Africa (and possibly at the MiRC) that employed EBL to define functional nanometre-scale semiconductor devices. Since no standard process recipe could be employed, the complete design and manufacturing process was based on self-obtained equipment characterization data and material properties. The manufacturing process was unprecedented in both the CEFIM and MiRC clean-rooms. The manufacture of nanometre-scale Si finger junctions not only approached the manufacturing limits of the employed processing machinery, but also had to overcome undesirable physical effects that in larger-scale semiconductor manufacture usually are negligible. The device design, mask layout and manufacturing process therefore had to incorporate various material, equipment limitation and physical phenomena like impurity redistribution occurring during the physical manufacturing process. Although the complicated manufacturing process allowed many unexpected problems to occur, it was expected that at least the simple junction breakdown devices be functional and capable of delivering data regarding quantum confinement effects. Although due to design and processing oversights only 29 out of 505 measured SOI light sources were useful light emitters, the design and manufacture of the SOI light sources was successful in the sense that enough SOI light sources were available to conduct useful optical characterization measurements. In spite of the fact that the functional light sources did not achieve the desired horizontal (width) confinement, measured optical spectra of certain devices indicate that vertical (thickness) confinement had been achieved. All spectrometer-measured thickness-confined SOI light sources displayed a pronounced optical power for 600 nm < λ < 1 μm. The SOI light source with the highest optical power output emitted about 8 times more optical power around λ = 850 nm than a 0.35 μm bulk-CMOS avalanche light-source operating at the same current. Possible explanations for this effect are given. It was shown that the buried oxide (BOX) layer in a SOI process could be used to reflect about 25 % of the light that would usually be lost to downward radiation back up, thereby increasing the external power efficiency of SOI light sources. This document elaborates on the technical objectives, approach, chip and process design, physical wafer manufacture, production process control and measurement of the nanometre-scale SOI light sources. Copyright